Advanced Micro Devices' first 45-nanometer chip, the Shanghai quad-core Opteron, has made its debut at resellers.

The officially unannounced Opteron 837X and 838X series processors are not cheap. Online reseller PC Connection lists the Opteron QC (quad-core) 8384 at $2,509. Another reseller, Buy.com lists the same processor at $2,240.

The 8384 is expected to run at 2.7GHz and draw 75 watts, relatively low power consumption for a quad-core server processor.

The 8385--same clock speed with a faster system bus--is offered for $2,509 at PC Connection.

Other processors listed include the 8382 (2.6GHz), 8380 (2.5GHz), and 8378 (2.4GHz), priced at $2,177, $1,768, and $1,360 respectively at PC Connection. Note that these prices will differ from official pricing from AMD.

The Shanghai Opteron 230X series includes the 2382 (2.6GHz) and 2380 (2.5GHz). These are priced at $1,019 and $814 respectively at PC Connnection.

Rollout of the chip is expected officially on November 13, according to industry sources.

AMD is hoping to make a much better impression with Shanghai. Its first quad-core chip, Barcelona, was rolled out in September 2007 to great fanfare only to be delayed a whopping eight months (or more, depending how the delay is calculated) due to production glitches and bugs. This gave Intel an opportunity to regain ground it had lost to AMD in the server chip market.

Shanghai is in full production right now, Pat Patla, general manager of AMD's server and workstation chip business said last month. The was confirmed during AMD's earnings conference call earlier this month.

Server vendors are expected to be shipping systems as early as this quarter. A Sun Microsystems spokesperson said Tuesday that it plans to offer Shanghai processors on its current x64 platforms running Barcelona. Systems using the new processors are targeted for the first quarter of 2009, the spokesperson said.

At the same clock frequency (speed), Shanghai will outperform Barcelona by about 20 percent, Patla said last month.

AMD is also boosting the size of the cache memory, which typically speeds performance, from 2 megabytes to 6 megabytes. Another speed improvement will come from increasing "instructions per clock."

Patla also said last month that AMD is "turning on HT3 (HyperTransport 3)"--a communication path between chips--and that partners will start to validate systems in the first quarter of next year with this technology.

Intel Corp. expects its forthcoming Intel Core i7 processors to be much more powerful compared to existing central processing units, according to documents reportedly seen by the media. If the information turns to be precise enough, then Intel has all chances to keep processor performance crown even after smaller rival Advanced Micro Devices launches its new chips...

With the fourth quarter now upon us, the market's gaze has begun to turn full force on AMD and the imminent launch of the company's Shanghai processor. Shanghai, for those of you who haven't been following AMD, is a 45nm die-shrink of the company's Barcelona architecture with a 6MB L3 cache (up from 2MB on Barcelona), improved performance and power characteristics, and an additional set of as-yet-unspecified performance tweaks. On Monday, a reporter had a chance to sit down with Patrick Patla, head of AMD's workstation and server division, who offered insight into Shanghai's development process, as well as a few tantalizing details on what we can expect when the new processor ships...

Intel has developed an updated technology that could virtually solve questions of memory speed, the semiconductor firm has revealed at its recent Research@Intel event. Developers at the company have created dynamic RAM that behaves like typical system memory but needs just two transistors for each memory cell and which needs no capacitors. The invention makes dynamic RAM small enough that it can be embedded in a processor rather than put into a separate module, potentially eliminating several bottlenecks inherent to the static RAM used for cache on current processors.
A processor that complements or replaces existing cache would have much more on-chip bandwidth than any current processor and would be tied to clock speed, according to Intel. Where a 45-nanometer, quad-core Xeon currently has some of the fastest bandwidth available at between 18 to 20 gigabytes per second, a basic 2GHz processor made on an older 65-nanometer process could shuttle data at 128 gigabytes per second. Dynamic RAM also promises more storage in the same space and a lower price that could translate to the processors themselves.

The advancement could effectively overhaul Intel's approach to its chip designs as well that of programmers. Very fast memory access is considered critical to future many-core processors and may be necessary for the production equivalent of Intel's 80-core Teraflops Research Chip; developers writing for this and related processors may also depend on always having guaranteed access to cache, which would be virtually guaranteed with the cache becoming faster along with processors.

Intel hasn't said when or if it first expects to implement its two-transistor dynamic RAM into future chips, though mainstream processors with eight to 16 cores are due within the next few years.

Advanced Micro Devices (NYSE: AMD) on Wednesday introduced its two-year product road map for servers and workstations, saying it would release its first six-core chip next year and a 12-core processor on a new platform in the first half of 2010...

AMD is on target to ship its first 45-nm server chip, code-named Shanghai, in the latter part of this year, which would be about a year after Intel shipped its first products using the next-generation manufacturing process that makes it possible to shrink transistor size. Shanghai will be a four-core processor that delivers 25% better performance than the company's current 65-nm quad-core Opteron, formerly known as Barcelona. Shanghai also will ship under the Opteron brand.
Shanghai will use up to 20% less power during idle time than Barcelona and have 6 MB of L3 cache, which is twice the overall cache of its predecessor. In addition, Shanghai's support of DDR2-800 memory translates into a 10% boost in bandwidth.

Microsoft confirmed today that the final version of Windows XP Service Pack 3 has been released to PC manufacturers right on schedule. The update will be available to end users to download next Tuesday, April 29, and pushed to Windows Update in June. A post on Microsoft's TechNet developer site confirmed the release.

Microsoft gave us an early look at the update as a 580MB disk image. What we saw is barely changed from our preview of an early beta of SP3, and seeing Windows XP SP3 for the first time is highly unremarkable.

Far from being a new operating system, Windows XP SP3 is really an accumulation of updates for compatibility, security, and performance. It doesn't contain new features found in Vista, aside from Network Access Protection (NAP), which lets XP systems work with Windows Server 2008's ability to enforce system health requirements before allowing access to network assets. In addition to that feature, the only actually new ones are "Black Hole" Router Detection, more description in the Security Options control panel, kernel-level support for FIPS 140-1 Level 1 compliant cryptography, and a new Product Activation system that allows installation without immediately requiring a product key.

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