Re: DDR memory in pairs??


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Subject: Re: DDR memory in pairs??
Name: ludicrous
Date: 7/13/2005 4:01:46 PM (GMT-7)
IP Address: 4.227.250.214
In Reply to: DDR memory in pairs?? posted by Don Malling
Message:

In the bad old days, system architectures and memory architectures grew asymmetrically, so jury-rigged tricks like matched pairs were essential in order for the system to even run.

--30-pin SIMMs were 16-bits wide;
--72-pin SIMMs were 32-bits wide;
--168-pin DIMMs were and are 64-bits wide.

Without going into the handful of exceptions, summarily:

--the typical 386-class system had a 16-bit wide memory bus;
--the typical 486-class system had a 32-bit wide memory bus;
--Pentium-class and upward had a 64-bit wide memory bus.

Thus, a 386-class sytem could support 30s as singles; a 486-class system using 30s required matched pairs; and a Pentium-class system using 30s (very rare) required matched quads. Similarly, a 486-class system could use single 72s but anything Pentium-class and higher required 72s installed as matched pairs.

The 168-pin DIMM is a 64-bit wide device, so singles are quite feasible (and were pretty much de rigeur for some of the final Skt7s, all Super7s and nearly all PII hardware and up, although a few early PIIs still used matched-pair 72s). There are several variant approaches now. Many systems just require singles, and extra memory slots merely allow for more upgrading; some new upper-end designs from AMD and Intel use "dual channel" to get (or effectively get) a 128-bit memory bus. However, this is usually no longer a requirement: the memory controller is intelligent enough to handle single-channel operation and, in some cases, address unmatched devices when operating in dual-channel mode.

Your best bet for more in-depth details is to cruise around the better-quality hardware review sights, and read (or at least skim through) pretty much any chipset review published in the past five years.

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