Re: anand's...

Subject: Re: anand's...
Name: MS
Date: 3/20/2001 7:59:14 AM (GMT-7)
IP Address: 192.12.230.85
In Reply to: anand's... posted by tide
Message:

"The vital thing is that the base PLL for the front side bus (100 / 133 MHz, coupled to either 1/3 or ¼ PCI divider needs to be set by jumper JP3. Because of the hard-coded setup, the BIOS does not need to reconfigure the operating conditions on-the-fly but can go straight ahead and boot."...

If you would only read, grasshopper
(Kyle at [H]ardOCP already made fun of me preaching jumpers instead of SoftBIOS for the exact same reasons as in Mike Andrawes article (LOL)